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| author |   Yann Gautier <yann.gautier@foss.st.com> | 2023-06-19 13:51:15 +0200 |
|---|---|---|
| committer |   Ulf Hansson <ulf.hansson@linaro.org> | 2023-06-20 11:44:40 +0200 |
| commit | 1f9f2cf3145e67dc5bbc0ac25b52bfa11b17a882 (patch) | |
| tree | f5476d84ac6d808bbdf144a006ce6b7acbd8c338 /include/linux/bcma/ssh:/git@git.zx2c4.com/git: | |
| parent | mmc: core: disable TRIM on Micron MTFC4GACAJCN-1M (diff) | |
dt-bindings: mmc: mmci: Add st,stm32mp25-sdmmc2 compatible
For STM32MP25, we'll need to distinguish how is managed the delay block.
This is done through a new comptible dedicated for this SoC, as the
delay block registers are located in SYSCFG peripheral.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230619115120.64474-2-yann.gautier@foss.st.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'include/linux/bcma/ssh:/git@git.zx2c4.com/git:')
0 files changed, 0 insertions, 0 deletions