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authorThomas Gleixner <tglx@linutronix.de>2020-06-11 15:17:57 +0200
committerThomas Gleixner <tglx@linutronix.de>2020-06-11 15:17:57 +0200
commitf77d26a9fc525286bcef3d4f98b52e17482cf49c (patch)
tree6b179c9aa84787773cb601a14a64255e2912154b /include/linux/bitops.h
parentEDAC/amd64: Add AMD family 17h model 60h PCI IDs (diff)
parentx86/entry: Unbreak __irqentry_text_start/end magic (diff)
downloadwireguard-linux-f77d26a9fc525286bcef3d4f98b52e17482cf49c.tar.xz
wireguard-linux-f77d26a9fc525286bcef3d4f98b52e17482cf49c.zip
Merge branch 'x86/entry' into ras/core
to fixup conflicts in arch/x86/kernel/cpu/mce/core.c so MCE specific follow up patches can be applied without creating a horrible merge conflict afterwards.
Diffstat (limited to 'include/linux/bitops.h')
-rw-r--r--include/linux/bitops.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/linux/bitops.h b/include/linux/bitops.h
index 9acf654f0b19..99f2ac30b1d9 100644
--- a/include/linux/bitops.h
+++ b/include/linux/bitops.h
@@ -72,7 +72,7 @@ static inline int get_bitmask_order(unsigned int count)
static __always_inline unsigned long hweight_long(unsigned long w)
{
- return sizeof(w) == 4 ? hweight32(w) : hweight64(w);
+ return sizeof(w) == 4 ? hweight32(w) : hweight64((__u64)w);
}
/**