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authorTero Kristo <t-kristo@ti.com>2017-01-30 16:01:36 +0200
committerTero Kristo <t-kristo@ti.com>2017-03-08 13:03:07 +0200
commitc91f07801f144920f8467486a1e36e42ed9d9ff2 (patch)
tree1bc999a2aca4a5142a475647e30e41a1fc701369 /include/linux/clk
parentclk: ti: omap4: cleanup unnecessary clock aliases (diff)
downloadwireguard-linux-c91f07801f144920f8467486a1e36e42ed9d9ff2.tar.xz
wireguard-linux-c91f07801f144920f8467486a1e36e42ed9d9ff2.zip
clk: ti: drop unnecessary MEMMAP_ADDRESSING flag
This has been superceded by the usage of ti_clk_ll_ops for now. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'include/linux/clk')
-rw-r--r--include/linux/clk/ti.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/include/linux/clk/ti.h b/include/linux/clk/ti.h
index 626ae94b7444..affdabd0b6a1 100644
--- a/include/linux/clk/ti.h
+++ b/include/linux/clk/ti.h
@@ -168,7 +168,6 @@ struct clk_hw_omap {
* should be used. This is a temporary solution - a better approach
* would be to associate clock type-specific data with the clock,
* similar to the struct dpll_data approach.
- * MEMMAP_ADDRESSING: Use memmap addressing to access clock registers.
*/
#define ENABLE_REG_32BIT (1 << 0) /* Use 32-bit access */
#define CLOCK_IDLE_CONTROL (1 << 1)
@@ -176,7 +175,6 @@ struct clk_hw_omap {
#define ENABLE_ON_INIT (1 << 3) /* Enable upon framework init */
#define INVERT_ENABLE (1 << 4) /* 0 enables, 1 disables */
#define CLOCK_CLKOUTX2 (1 << 5)
-#define MEMMAP_ADDRESSING (1 << 6)
/* CM_CLKEN_PLL*.EN* bit values - not all are available for every DPLL */
#define DPLL_LOW_POWER_STOP 0x1