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| author |   Aswath Govindraju <a-govindraju@ti.com> | 2021-01-05 16:28:12 +0530 |
|---|---|---|
| committer |   Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2021-01-20 18:52:12 +0100 |
| commit | f6f1f8e6e3eea25f539105d48166e91f0ab46dd1 (patch) | |
| tree | c35ff34709cdfb1bf2949e9a289e7632f2c86d4c /include/linux/eeprom_93xx46.h | |
| parent | Documentation: devicetree: Add new compatible string for eeprom microchip 93LC46B (diff) | |
| download | wireguard-linux-f6f1f8e6e3eea25f539105d48166e91f0ab46dd1.tar.xz wireguard-linux-f6f1f8e6e3eea25f539105d48166e91f0ab46dd1.zip | |
misc: eeprom_93xx46: Add quirk to support Microchip 93LC46B eeprom
A dummy zero bit is sent preceding the data during a read transfer by the
Microchip 93LC46B eeprom (section 2.7 of[1]). This results in right shift
of data during a read. In order to ignore this bit a quirk can be added to
send an extra zero bit after the read address.
Add a quirk to ignore the zero bit sent before data by adding a zero bit
after the read address.
[1] - https://www.mouser.com/datasheet/2/268/20001749K-277859.pdf
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Link: https://lore.kernel.org/r/20210105105817.17644-3-a-govindraju@ti.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'include/linux/eeprom_93xx46.h')
| -rw-r--r-- | include/linux/eeprom_93xx46.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/eeprom_93xx46.h b/include/linux/eeprom_93xx46.h index eec7928ff8fe..99580c22f91a 100644 --- a/include/linux/eeprom_93xx46.h +++ b/include/linux/eeprom_93xx46.h @@ -16,6 +16,8 @@ struct eeprom_93xx46_platform_data { #define EEPROM_93XX46_QUIRK_SINGLE_WORD_READ (1 << 0) /* Instructions such as EWEN are (addrlen + 2) in length. */ #define EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH (1 << 1) +/* Add extra cycle after address during a read */ +#define EEPROM_93XX46_QUIRK_EXTRA_READ_CYCLE BIT(2) /* * optional hooks to control additional logic |