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authorShengzhou Liu <Shengzhou.Liu@freescale.com>2012-08-22 18:17:00 +0800
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2012-09-05 16:52:08 -0700
commit3735ba8db8e6ea22ad3ff524328926d8d780a884 (patch)
tree002b17dc5fe22c4c437f4f79ac8657c343587243 /include/linux/fsl_devices.h
parentUSB: mos7720: fix to use list_for_each_entry_safe() when delete items (diff)
downloadwireguard-linux-3735ba8db8e6ea22ad3ff524328926d8d780a884.tar.xz
wireguard-linux-3735ba8db8e6ea22ad3ff524328926d8d780a884.zip
powerpc/usb: fix bug of CPU hang when missing USB PHY clock
when missing USB PHY clock, kernel booting up will hang during USB initialization. We should check USBGP[PHY_CLK_VALID] bit to avoid CPU hanging in this case. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'include/linux/fsl_devices.h')
-rw-r--r--include/linux/fsl_devices.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index 15be561e7397..ccfc4bb3dc48 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -19,6 +19,7 @@
#define FSL_UTMI_PHY_DLY 10 /*As per P1010RM, delay for UTMI
PHY CLK to become stable - 10ms*/
+#define FSL_USB_PHY_CLK_TIMEOUT 1000 /* uSec */
#define FSL_USB_VER_OLD 0
#define FSL_USB_VER_1_6 1
#define FSL_USB_VER_2_2 2