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| author |   Lijo Lazar <lijo.lazar@amd.com> | 2025-12-02 13:20:25 +0530 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2026-01-08 11:40:15 -0500 |
| commit | d1010ca49b4f59b91cd64903e67b9547bdd2fa42 (patch) | |
| tree | 1495d51503c7f9b4c5543817c8aecda5663fc03b /include/linux/hsi/ssh:/git@git.zx2c4.com | |
| parent | drm/amd/amdgpu: Port over some missing registers and bits from GC 10.1 to 10.3 (v2) (diff) | |
drm/amd/pm: Use driver table structure in smuv11
Use driver table structure for gpu metrics in smuv11. The default cache
interval is set at 5ms.
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'include/linux/hsi/ssh:/git@git.zx2c4.com')
0 files changed, 0 insertions, 0 deletions