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| author |   Zenghui Yu <yuzenghui@huawei.com> | 2020-07-20 17:23:28 +0800 |
|---|---|---|
| committer |   Marc Zyngier <maz@kernel.org> | 2020-07-27 08:55:03 +0100 |
| commit | 3af9571cd585efafc2facbd8dbd407317ff898cf (patch) | |
| tree | 2bc966928fa712ca99b2fc0344ec678f50780ee2 /include/linux/irqchip | |
| parent | irqchip/irq-bcm7038-l1: Guard uses of cpu_logical_map (diff) | |
| download | wireguard-linux-3af9571cd585efafc2facbd8dbd407317ff898cf.tar.xz wireguard-linux-3af9571cd585efafc2facbd8dbd407317ff898cf.zip | |
irqchip/gic-v4.1: Ensure accessing the correct RD when writing INVALLR
The GICv4.1 spec tells us that it's CONSTRAINED UNPREDICTABLE to issue a
register-based invalidation operation for a vPEID not mapped to that RD,
or another RD within the same CommonLPIAff group.
To follow this rule, commit f3a059219bc7 ("irqchip/gic-v4.1: Ensure mutual
exclusion between vPE affinity change and RD access") tried to address the
race between the RD accesses and the vPE affinity change, but somehow
forgot to take GICR_INVALLR into account. Let's take the vpe_lock before
evaluating vpe->col_idx to fix it.
Fixes: f3a059219bc7 ("irqchip/gic-v4.1: Ensure mutual exclusion between vPE affinity change and RD access")
Signed-off-by: Zenghui Yu <yuzenghui@huawei.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20200720092328.708-1-yuzenghui@huawei.com
Diffstat (limited to 'include/linux/irqchip')
0 files changed, 0 insertions, 0 deletions