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authorMoshe Shemesh <moshe@mellanox.com>2020-04-24 12:45:07 -0700
committerSaeed Mahameed <saeedm@mellanox.com>2020-04-28 12:45:18 -0700
commit3df0107784ceb388039b1fe510a8c7b8816de8f0 (patch)
treeddb514b2f16a4979747faa6d1753953294e4a0a3 /include/linux/mlx5/mlx5_ifc.h
parentnet/mlx5: Add structure layout and defines for MFRL register (diff)
downloadwireguard-linux-3df0107784ceb388039b1fe510a8c7b8816de8f0.tar.xz
wireguard-linux-3df0107784ceb388039b1fe510a8c7b8816de8f0.zip
net/mlx5: Add structure and defines for pci sync for fw update event
Add needed structure layouts and defines for pci sync for fw update event. The downstream patches will include event handlers for this event type. Signed-off-by: Moshe Shemesh <moshe@mellanox.com> Reviewed-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Diffstat (limited to 'include/linux/mlx5/mlx5_ifc.h')
-rw-r--r--include/linux/mlx5/mlx5_ifc.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index 9e6a3cec1e32..058ded202b65 100644
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -1317,7 +1317,9 @@ struct mlx5_ifc_cmd_hca_cap_bits {
u8 wol_p[0x1];
u8 stat_rate_support[0x10];
- u8 reserved_at_1f0[0xc];
+ u8 reserved_at_1f0[0x1];
+ u8 pci_sync_for_fw_update_event[0x1];
+ u8 reserved_at_1f2[0xa];
u8 cqe_version[0x4];
u8 compact_address_vector[0x1];