diff options
| author |   Rahul Rameshbabu <rrameshbabu@nvidia.com> | 2022-11-21 17:16:38 -0800 |
|---|---|---|
| committer |   Saeed Mahameed <saeedm@nvidia.com> | 2023-02-04 02:07:03 -0800 |
| commit | b63636b6c170aaf0becd67d14ba7c538d1f8d4f5 (patch) | |
| tree | 6227003321834cd29c6f8877f30e447ed6c89957 /include/linux/mlx5/mlx5_ifc.h | |
| parent | net/mlx5: Document support for RoCE HCA disablement capability (diff) | |
| download | wireguard-linux-b63636b6c170aaf0becd67d14ba7c538d1f8d4f5.tar.xz wireguard-linux-b63636b6c170aaf0becd67d14ba7c538d1f8d4f5.zip | |
net/mlx5: Add firmware support for MTUTC scaled_ppm frequency adjustments
When device is capable of handling scaled ppm values for adjusting
frequency, conversion to ppb will not be done by the driver. Instead, the
scaled ppm value will be passed directly to the device for the frequency
adjustment operation.
Signed-off-by: Rahul Rameshbabu <rrameshbabu@nvidia.com>
Reviewed-by: Gal Pressman <gal@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Diffstat (limited to 'include/linux/mlx5/mlx5_ifc.h')
| -rw-r--r-- | include/linux/mlx5/mlx5_ifc.h | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h index 1b6201bb04c1..7cf6a78fea07 100644 --- a/include/linux/mlx5/mlx5_ifc.h +++ b/include/linux/mlx5/mlx5_ifc.h @@ -9926,13 +9926,20 @@ struct mlx5_ifc_mpegc_reg_bits { }; enum { + MLX5_MTUTC_FREQ_ADJ_UNITS_PPB = 0x0, + MLX5_MTUTC_FREQ_ADJ_UNITS_SCALED_PPM = 0x1, +}; + +enum { MLX5_MTUTC_OPERATION_SET_TIME_IMMEDIATE = 0x1, MLX5_MTUTC_OPERATION_ADJUST_TIME = 0x2, MLX5_MTUTC_OPERATION_ADJUST_FREQ_UTC = 0x3, }; struct mlx5_ifc_mtutc_reg_bits { - u8 reserved_at_0[0x1c]; + u8 reserved_at_0[0x5]; + u8 freq_adj_units[0x3]; + u8 reserved_at_8[0x14]; u8 operation[0x4]; u8 freq_adjustment[0x20]; @@ -10005,7 +10012,8 @@ struct mlx5_ifc_pcam_reg_bits { }; struct mlx5_ifc_mcam_enhanced_features_bits { - u8 reserved_at_0[0x51]; + u8 reserved_at_0[0x50]; + u8 mtutc_freq_adj_units[0x1]; u8 mtutc_time_adjustment_extended_range[0x1]; u8 reserved_at_52[0xb]; u8 mcia_32dwords[0x1]; |