diff options
| author |   Krishna Konda <kkonda@codeaurora.org> | 2020-05-01 19:23:01 +0530 |
|---|---|---|
| committer |   Ulf Hansson <ulf.hansson@linaro.org> | 2020-05-28 11:21:03 +0200 |
| commit | 064f7e58ee42372be05ec87fdf57864c7475ba93 (patch) | |
| tree | ae51df6a8d1d9167673a8d6d7b03f3686442b366 /include/linux/mmc | |
| parent | mmc: sdio: Align the initialization commands in retry path for UHS-I (diff) | |
| download | wireguard-linux-064f7e58ee42372be05ec87fdf57864c7475ba93.tar.xz wireguard-linux-064f7e58ee42372be05ec87fdf57864c7475ba93.zip | |
mmc: core: expose info about enhanced rpmb support
Following eMMC JEDEC JESD84-B51 standard, an enhanced form of
rpmb is supported. What this enhanced mode supports is in addition
to be able to write one rpmb or two rpmb frames at a time,
32 frames can be written at a time.
Expose this information present in ext csd field so that the
user space application that wants to make use of this can do so.
Signed-off-by: Krishna Konda <kkonda@codeaurora.org>
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
Link: https://lore.kernel.org/r/1588341189-4371-1-git-send-email-vbadigan@codeaurora.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'include/linux/mmc')
| -rw-r--r-- | include/linux/mmc/card.h | 1 | ||||
| -rw-r--r-- | include/linux/mmc/mmc.h | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h index cf3780a6ccc4..7d46411ffaa2 100644 --- a/include/linux/mmc/card.h +++ b/include/linux/mmc/card.h @@ -48,6 +48,7 @@ struct mmc_ext_csd { u8 sec_feature_support; u8 rel_sectors; u8 rel_param; + bool enhanced_rpmb_supported; u8 part_config; u8 cache_ctrl; u8 rst_n_function; diff --git a/include/linux/mmc/mmc.h b/include/linux/mmc/mmc.h index 4b85ef05a906..d9a65c6a8816 100644 --- a/include/linux/mmc/mmc.h +++ b/include/linux/mmc/mmc.h @@ -325,6 +325,7 @@ static inline bool mmc_ready_for_data(u32 status) */ #define EXT_CSD_WR_REL_PARAM_EN (1<<2) +#define EXT_CSD_WR_REL_PARAM_EN_RPMB_REL_WR (1<<4) #define EXT_CSD_BOOT_WP_B_PWR_WP_DIS (0x40) #define EXT_CSD_BOOT_WP_B_PERM_WP_DIS (0x10) |