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author | 2016-05-26 13:50:32 +0800 | |
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committer | 2016-07-25 10:34:09 +0200 | |
commit | 649c6059d2371fef886a8f967e21416204723d63 (patch) | |
tree | 7915ac283672e0acf55916d41479365c36fa381c /include/linux/mmc | |
parent | mmc: mmc: fix switch timeout issue caused by jiffies precision (diff) | |
download | wireguard-linux-649c6059d2371fef886a8f967e21416204723d63.tar.xz wireguard-linux-649c6059d2371fef886a8f967e21416204723d63.zip |
mmc: mmc: Fix HS switch failure in mmc_select_hs400()
To slove the issue which was found on gru board for hs400.
[ 4.616946] sdhci: Secure Digital Host Controller Interface driver
[ 4.623135] sdhci: Copyright(c) Pierre Ossman
[ 4.722575] sdhci-pltfm: SDHCI platform and OF driver helper
[ 4.730962] sdhci-arasan fe330000.sdhci: No vmmc regulator found
[ 4.737444] sdhci-arasan fe330000.sdhci: No vqmmc regulator found
[ 4.774930] mmc0: SDHCI controller on fe330000.sdhci [fe330000.sdhci] using ADMA
[ 4.980295] mmc0: switch to high-speed from hs200 failed, err:-84
[ 4.986487] mmc0: error -84 whilst initialising MMC card
We should change HS400 mode selection timing to meet JEDEC
specification. The JEDEC 5.1 said that change the frequency to <= 52MHZ
after HS_TIMING switch. Refer to section 6.6.2.3 "HS400" timing mode
selection:
Set the "Timing Interface" parameter in the HS_TIMING[185] field of the
Extended CSD register to 0x1 to switch to High Speed mode and then set
the clock frequency to a value not greater than 52MHZ.
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'include/linux/mmc')
0 files changed, 0 insertions, 0 deletions