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| author |   Vivien Didelot <vivien.didelot@savoirfairelinux.com> | 2017-06-12 12:37:44 -0400 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2017-06-13 11:23:12 -0400 |
| commit | 8009df9e70330d185e02f0c447a7d19b6d3a4432 (patch) | |
| tree | fac4f5c8c9bdf272333eae94e8d689d63b1226d1 /include/linux/phy.h | |
| parent | net: dsa: mv88e6xxx: prefix Port Association Vector macros (diff) | |
| download | wireguard-linux-8009df9e70330d185e02f0c447a7d19b6d3a4432.tar.xz wireguard-linux-8009df9e70330d185e02f0c447a7d19b6d3a4432.zip | |
net: dsa: mv88e6xxx: prefix Port IEEE Priority mapping macros
For implicit namespacing and clarity, prefix the common Port IEEE
Priority Remapping registers macros with MV88E6095_PORT_IEEE_PRIO.
The 88E6390 family turned the 0x18 register into a single indirect
table, document that at the same time.
Document the register and prefer ordered hex masks values for all
Marvell 16-bit registers.
Also fix the following checkpatch checks with a temporary variable:
CHECK: Alignment should match open parenthesis
#65: FILE: drivers/net/dsa/mv88e6xxx/port.c:932:
+ err = mv88e6xxx_port_ieeepmt_write(chip, port,
+ MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_INGRESS_PCP,
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/linux/phy.h')
0 files changed, 0 insertions, 0 deletions