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authorNaga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>2018-12-06 18:17:34 +0530
committerMichal Simek <michal.simek@xilinx.com>2018-12-13 16:07:04 +0100
commitfee10bd2267868f2a3e7ba008ef7665aac5e4412 (patch)
treead1da90482099b82d538b336663c7789ad284a9d /include/linux/pl353-smc.h
parentdt-bindings: memory: Add pl353 smc controller devicetree binding information (diff)
downloadwireguard-linux-fee10bd2267868f2a3e7ba008ef7665aac5e4412.tar.xz
wireguard-linux-fee10bd2267868f2a3e7ba008ef7665aac5e4412.zip
memory: pl353: Add driver for arm pl353 static memory controller
Add driver for arm pl353 static memory controller. This controller is used in Xilinx Zynq SoC for interfacing the NAND and NOR/SRAM memory devices. Signed-off-by: Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'include/linux/pl353-smc.h')
-rw-r--r--include/linux/pl353-smc.h30
1 files changed, 30 insertions, 0 deletions
diff --git a/include/linux/pl353-smc.h b/include/linux/pl353-smc.h
new file mode 100644
index 000000000000..0e0d3df9bf72
--- /dev/null
+++ b/include/linux/pl353-smc.h
@@ -0,0 +1,30 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * ARM PL353 SMC Driver Header
+ *
+ * Copyright (C) 2012 - 2018 Xilinx, Inc
+ */
+
+#ifndef __LINUX_PL353_SMC_H
+#define __LINUX_PL353_SMC_H
+
+enum pl353_smc_ecc_mode {
+ PL353_SMC_ECCMODE_BYPASS = 0,
+ PL353_SMC_ECCMODE_APB = 1,
+ PL353_SMC_ECCMODE_MEM = 2
+};
+
+enum pl353_smc_mem_width {
+ PL353_SMC_MEM_WIDTH_8 = 0,
+ PL353_SMC_MEM_WIDTH_16 = 1
+};
+
+u32 pl353_smc_get_ecc_val(int ecc_reg);
+bool pl353_smc_ecc_is_busy(void);
+int pl353_smc_get_nand_int_status_raw(void);
+void pl353_smc_clr_nand_int(void);
+int pl353_smc_set_ecc_mode(enum pl353_smc_ecc_mode mode);
+int pl353_smc_set_ecc_pg_size(unsigned int pg_sz);
+int pl353_smc_set_buswidth(unsigned int bw);
+void pl353_smc_set_cycles(u32 timings[]);
+#endif