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| author |   Antoine Tenart <antoine.tenart@bootlin.com> | 2019-07-24 10:17:11 +0200 |
|---|---|---|
| committer |   Paul Burton <paul.burton@mips.com> | 2019-08-24 15:17:37 +0100 |
| commit | b4742e6682d5809ddf4d0a63cb57e629e815ec63 (patch) | |
| tree | 8773e70c984f06e5ad2533d28a22bf0daacd3a61 /include/linux/reset-controller.h | |
| parent | MIPS: dts: mscc: describe the PTP register range (diff) | |
| download | wireguard-linux-b4742e6682d5809ddf4d0a63cb57e629e815ec63.tar.xz wireguard-linux-b4742e6682d5809ddf4d0a63cb57e629e815ec63.zip | |
MIPS: dts: mscc: describe the PTP ready interrupt
This patch adds a description of the PTP ready interrupt, which can be
triggered when a PTP timestamp is available on an hardware FIFO.
Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: davem@davemloft.net
Cc: richardcochran@gmail.com
Cc: alexandre.belloni@bootlin.com
Cc: UNGLinuxDriver@microchip.com
Cc: ralf@linux-mips.org
Cc: jhogan@kernel.org
Cc: netdev@vger.kernel.org
Cc: linux-mips@vger.kernel.org
Cc: thomas.petazzoni@bootlin.com
Cc: allan.nielsen@microchip.com
Diffstat (limited to 'include/linux/reset-controller.h')
0 files changed, 0 insertions, 0 deletions