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| author |   Archit Taneja <archit@ti.com> | 2012-05-07 16:51:36 +0530 |
|---|---|---|
| committer |   Tomi Valkeinen <tomi.valkeinen@ti.com> | 2012-05-09 13:43:17 +0300 |
| commit | 408d9dbbc4eebd8c4f2cd5d487f1b9c3c12c2c59 (patch) | |
| tree | 7f640d074dd5df13fc366cb1f49b36f301bb5c84 /include/linux/v4l2-subdev.h | |
| parent | OMAPDSS: Fix DSI_FCLK clock source selection (diff) | |
| download | wireguard-linux-408d9dbbc4eebd8c4f2cd5d487f1b9c3c12c2c59.tar.xz wireguard-linux-408d9dbbc4eebd8c4f2cd5d487f1b9c3c12c2c59.zip | |
OMAPDSS: DISPC: Remove Fake VSYNC support
Fake VSYNC support is a hack and has some bugs in it. It isn't used by any user
of DSS. Remove Fake VSYNC support. For DSI command mode and RFBI panels, a user
of DSS should wait for the completion of a frame by using the panel driver's
sync op.
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'include/linux/v4l2-subdev.h')
0 files changed, 0 insertions, 0 deletions