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author | 2020-03-18 21:06:13 +0900 | |
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committer | 2020-03-24 11:43:28 +0200 | |
commit | 2d284768b49bcf1c643c08a201ff2161041178ef (patch) | |
tree | 90bb26bd07740c47c6c73c839a27306dd50882c1 /include/linux | |
parent | mtd: spi-nor: Set all BP bits to one when lock_len == mtd->size (diff) | |
download | wireguard-linux-2d284768b49bcf1c643c08a201ff2161041178ef.tar.xz wireguard-linux-2d284768b49bcf1c643c08a201ff2161041178ef.zip |
mtd: spi-nor: Add generic formula for SR block protection handling
The current mainline locking was restricted and could only be applied
to flashes that have 3 block protection bits and fixed locking ratio.
A new method of normalization was reached at the end of the discussion [1].
(1) - if bp slot is insufficient.
(2) - if bp slot is sufficient.
if (bp_slots_needed > bp_slots) // (1)
min_prot_length = sector_size << (bp_slots_needed - bp_slots);
else // (2)
min_prot_length = sector_size;
This patch changes logic to handle block protection based on min_prot_length.
It is suitable for the overall flashes with exception of some corner cases
(see EON and catalyst) and easy to extend and apply for the case of 2bit or
4bit block protection.
[1] http://lists.infradead.org/pipermail/linux-mtd/2020-February/093934.html
Signed-off-by: Jungseung Lee <js07.lee@samsung.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Tested-by: Michael Walle <michael@walle.cc>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Diffstat (limited to 'include/linux')
0 files changed, 0 insertions, 0 deletions