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author | 2020-01-27 13:03:00 -0800 | |
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committer | 2020-01-27 13:03:00 -0800 | |
commit | 6a1000bd27035bba17ede9dc915166276a811edb (patch) | |
tree | 92389983cc8bd09ba5b1cdebabfcad882f8ce3f3 /include/linux | |
parent | Merge tag 'for-5.6/libata-2020-01-27' of git://git.kernel.dk/linux-block (diff) | |
parent | remove ioremap_nocache and devm_ioremap_nocache (diff) | |
download | wireguard-linux-6a1000bd27035bba17ede9dc915166276a811edb.tar.xz wireguard-linux-6a1000bd27035bba17ede9dc915166276a811edb.zip |
Merge tag 'ioremap-5.6' of git://git.infradead.org/users/hch/ioremap
Pull ioremap updates from Christoph Hellwig:
"Remove the ioremap_nocache API (plus wrappers) that are always
identical to ioremap"
* tag 'ioremap-5.6' of git://git.infradead.org/users/hch/ioremap:
remove ioremap_nocache and devm_ioremap_nocache
MIPS: define ioremap_nocache to ioremap
Diffstat (limited to 'include/linux')
-rw-r--r-- | include/linux/io.h | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/include/linux/io.h b/include/linux/io.h index a59834bc0a11..b1c44bb4b2d7 100644 --- a/include/linux/io.h +++ b/include/linux/io.h @@ -66,8 +66,6 @@ void __iomem *devm_ioremap(struct device *dev, resource_size_t offset, resource_size_t size); void __iomem *devm_ioremap_uc(struct device *dev, resource_size_t offset, resource_size_t size); -void __iomem *devm_ioremap_nocache(struct device *dev, resource_size_t offset, - resource_size_t size); void __iomem *devm_ioremap_wc(struct device *dev, resource_size_t offset, resource_size_t size); void devm_iounmap(struct device *dev, void __iomem *addr); @@ -87,7 +85,7 @@ void *__devm_memremap_pages(struct device *dev, struct resource *res); * Posting") mandate non-posted configuration transactions. There is * no ioremap API in the kernel that can guarantee non-posted write * semantics across arches so provide a default implementation for - * mapping PCI config space that defaults to ioremap_nocache(); arches + * mapping PCI config space that defaults to ioremap(); arches * should override it if they have memory mapping implementations that * guarantee non-posted writes semantics to make the memory mapping * compliant with the PCI specification. @@ -97,7 +95,7 @@ void *__devm_memremap_pages(struct device *dev, struct resource *res); static inline void __iomem *pci_remap_cfgspace(phys_addr_t offset, size_t size) { - return ioremap_nocache(offset, size); + return ioremap(offset, size); } #endif #endif |