diff options
| author |   Derek Fang <derek.fang@realtek.com> | 2020-02-18 21:51:51 +0800 |
|---|---|---|
| committer |   Mark Brown <broonie@kernel.org> | 2020-02-18 22:23:24 +0000 |
| commit | ebbfabc16d23dfd20eecd4b6e68212fec37ae7c6 (patch) | |
| tree | d6a60a1f68608efa5774bc1c65ba44f647f39e7c /include/sound | |
| parent | ASoC: SOF: Intel: Add Probe compress CPU DAIs (diff) | |
| download | wireguard-linux-ebbfabc16d23dfd20eecd4b6e68212fec37ae7c6.tar.xz wireguard-linux-ebbfabc16d23dfd20eecd4b6e68212fec37ae7c6.zip | |
ASoC: rt5682: Add CCF usage for providing I2S clks
There is a need to use RT5682 as DAI clock master for other codecs
within a platform, which means that the DAI clocks are required to
remain, regardless of whether the RT5682 is actually running
playback/capture.
The RT5682 CCF basic functions are implemented almost by the existing
internal functions and asoc apis. It needs a clk provider (rt5682 mclk)
to generate the bclk and wclk outputs.
The RT5682 CCF supports and restricts as below:
1. Fmt of DAI-AIF1 must be configured to master before using CCF.
2. Only accept a 48MHz clk as the clk provider.
3. Only provide a 48kHz wclk and a set of multiples of wclk as bclk.
There are some temporary limitations in this patch until a better
implementation.
Signed-off-by: Derek Fang <derek.fang@realtek.com>
Link: https://lore.kernel.org/r/1582033912-6841-1-git-send-email-derek.fang@realtek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'include/sound')
| -rw-r--r-- | include/sound/rt5682.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/include/sound/rt5682.h b/include/sound/rt5682.h index bc2c31734df1..6bf0e3581056 100644 --- a/include/sound/rt5682.h +++ b/include/sound/rt5682.h @@ -24,6 +24,12 @@ enum rt5682_jd_src { RT5682_JD1, }; +enum rt5682_dai_clks { + RT5682_DAI_WCLK_IDX, + RT5682_DAI_BCLK_IDX, + RT5682_DAI_NUM_CLKS, +}; + struct rt5682_platform_data { int ldo1_en; /* GPIO for LDO1_EN */ @@ -32,6 +38,8 @@ struct rt5682_platform_data { enum rt5682_dmic1_clk_pin dmic1_clk_pin; enum rt5682_jd_src jd_src; unsigned int btndet_delay; + + const char *dai_clk_names[RT5682_DAI_NUM_CLKS]; }; #endif |