diff options
| author |   Radim Krčmář <rkrcmar@ventanamicro.com> | 2025-07-25 18:54:09 +0200 |
|---|---|---|
| committer |   Paul Walmsley <pjw@kernel.org> | 2025-09-05 15:30:45 -0600 |
| commit | e108c8a94f3f958c877f6ec7a6052a893ae4aa98 (patch) | |
| tree | e33d461885923e5983e9e8b5f75e20f37ec46975 /include/uapi/linux/android/ssh:/git@git.zx2c4.com | |
| parent | ACPI: RISC-V: Fix FFH_CPPC_CSR error handling (diff) | |
riscv: use lw when reading int cpu in new_vmalloc_check
REG_L is wrong, because thread_info.cpu is 32-bit, not xlen-bit wide.
The struct currently has a hole after cpu, so little endian accesses
seemed fine.
Fixes: 503638e0babf ("riscv: Stop emitting preventive sfence.vma for new vmalloc mappings")
Cc: stable@vger.kernel.org
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Signed-off-by: Radim Krčmář <rkrcmar@ventanamicro.com>
Link: https://lore.kernel.org/r/20250725165410.2896641-4-rkrcmar@ventanamicro.com
Signed-off-by: Paul Walmsley <pjw@kernel.org>
Diffstat (limited to 'include/uapi/linux/android/ssh:/git@git.zx2c4.com')
0 files changed, 0 insertions, 0 deletions