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| author | 2025-05-26 15:05:02 +0300 | |
|---|---|---|
| committer | 2025-05-29 08:13:38 +0300 | |
| commit | 3e61b092e61d8f7f0b882f07ede9a0a553197e21 (patch) | |
| tree | cb6734f93bd8ab6c6ead5c9e51d608271eb1f55f /include/uapi/linux/byteorder/ssh:/git@git.zx2c4.com | |
| parent | drm/panelreplay: Panel Replay capability DPCD register definitions (diff) | |
drm/dp: Add Panel Replay capability bits from DP2.1 specification
Add PANEL REPLAY CAPABILITY register (0xb1) bits.
v3:
- added DP_DSC_DECODE_CAPABILITY definitions
- use defined shift instead of hardcoded value
v2: comment about DP2.1 changed as DP2.1a
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Acked-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://lore.kernel.org/r/20250526120512.1702815-3-jouni.hogander@intel.com
Diffstat (limited to 'include/uapi/linux/byteorder/ssh:/git@git.zx2c4.com')
0 files changed, 0 insertions, 0 deletions
