diff options
| author |   Jiaxun Yang <jiaxun.yang@flygoat.com> | 2024-06-16 14:25:02 +0100 |
|---|---|---|
| committer |   Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2024-06-21 10:16:15 +0200 |
| commit | 4a3e37b3caea817199757a0b13aa53dd7c9376c8 (patch) | |
| tree | ba80f3bcbec42697249e963aff884ae3d6a49230 /include/uapi/linux/byteorder/ssh:/git@git.zx2c4.com | |
| parent | Revert "MIPS: pci: lantiq: restore reset gpio polarity" (diff) | |
MIPS: mipsmtregs: Fix target register for MFTC0
Target register of mftc0 should be __res instead of $1, this is
a leftover from old .insn code.
Fixes: dd6d29a61489 ("MIPS: Implement microMIPS MT ASE helpers")
Cc: stable@vger.kernel.org
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'include/uapi/linux/byteorder/ssh:/git@git.zx2c4.com')
0 files changed, 0 insertions, 0 deletions