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| author |   Alexandre Demers <alexandre.f.demers@gmail.com> | 2025-03-09 12:48:51 -0400 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2025-03-11 12:36:48 -0400 |
| commit | 760632fa2e3dbb13a9b55acbb960592628d274dd (patch) | |
| tree | 16a07a543e2a2f83df38e951b17556ea2ac6d581 /include/uapi/linux/byteorder/ssh:/git@git.zx2c4.com | |
| parent | drm/amdgpu: prepare DCE6 uniformisation with DCE8 and DCE10 (diff) | |
drm/amdgpu: fix SI's GB_ADDR_CONFIG_GOLDEN values and wire up sid.h in GFX6
By wiring up sid.h in GFX6, we end up with a few duplicated defines such as
the golden registers. Let's clean this up.
[TAHITI,VERDE, HAINAN]_GB_ADDR_CONFIG_GOLDEN were defined both in sid.h
and under si_enums.h, with different values. Keep the values used under radeon
and move them under gfx_v6_0.c where they are used (as it is done under cik)
Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'include/uapi/linux/byteorder/ssh:/git@git.zx2c4.com')
0 files changed, 0 insertions, 0 deletions