diff options
| author |   George Moussalem <george.moussalem@outlook.com> | 2025-06-30 16:35:00 +0400 |
|---|---|---|
| committer |   Bjorn Andersson <andersson@kernel.org> | 2025-07-16 23:09:46 -0500 |
| commit | f6a4a55ae5d99f865e106916a9295548e381de47 (patch) | |
| tree | 56821cf897689bde00087f7e6c600d23f6b7282b /include/uapi/linux/byteorder/ssh:/git@git.zx2c4.com | |
| parent | clk: qcom: gcc-qcm2290: Set HW_CTRL_TRIGGER for video GDSC (diff) | |
clk: qcom: gcc-ipq5018: fix GE PHY reset
The MISC reset is supposed to trigger a resets across the MDC, DSP, and
RX & TX clocks of the IPQ5018 internal GE PHY. So let's set the bitmask
of the reset definition accordingly in the GCC as per the downstream
driver.
Link: https://git.codelinaro.org/clo/qsdk/oss/kernel/linux-ipq-5.4/-/commit/00743c3e82fa87cba4460e7a2ba32f473a9ce932
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://lore.kernel.org/r/20250630-ipq5018-ge-phy-v6-1-01be06378c15@outlook.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'include/uapi/linux/byteorder/ssh:/git@git.zx2c4.com')
0 files changed, 0 insertions, 0 deletions