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| author |   Bjorn Helgaas <bhelgaas@google.com> | 2019-11-28 08:54:36 -0600 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2019-11-28 08:54:36 -0600 |
| commit | 774800cb099f8ee2f0f5c55ddb1809802d7c7cf8 (patch) | |
| tree | 6782fb83679d64ddccc89506262e6c5258497cbf /include/uapi | |
| parent | Merge branch 'pci/pm' (diff) | |
| parent | PCI: Do not use bus number zero from EA capability (diff) | |
| download | wireguard-linux-774800cb099f8ee2f0f5c55ddb1809802d7c7cf8.tar.xz wireguard-linux-774800cb099f8ee2f0f5c55ddb1809802d7c7cf8.zip | |
Merge branch 'pci/resource'
- Protect pci_reassign_bridge_resources() against concurrent
addition/removal (Benjamin Herrenschmidt)
- Fix bridge dma_ranges resource list cleanup (Rob Herring)
- Add PCI_STD_NUM_BARS for the number of standard BARs (Denis Efremov)
- Add "pci=hpmmiosize" and "pci=hpmmioprefsize" parameters to control the
MMIO and prefetchable MMIO window sizes of hotplug bridges
independently (Nicholas Johnson)
- Fix MMIO/MMIO_PREF window assignment that assigned more space than
desired (Nicholas Johnson)
- Only enforce bus numbers from bridge EA if the bridge has EA devices
downstream (Subbaraya Sundeep)
* pci/resource:
PCI: Do not use bus number zero from EA capability
PCI: Avoid double hpmemsize MMIO window assignment
PCI: Add "pci=hpmmiosize" and "pci=hpmmioprefsize" parameters
PCI: Add PCI_STD_NUM_BARS for the number of standard BARs
PCI: Fix missing bridge dma_ranges resource list cleanup
PCI: Protect pci_reassign_bridge_resources() against concurrent addition/removal
Diffstat (limited to 'include/uapi')
| -rw-r--r-- | include/uapi/linux/pci_regs.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h index 5869e5778a05..acb7d2bdb419 100644 --- a/include/uapi/linux/pci_regs.h +++ b/include/uapi/linux/pci_regs.h @@ -34,6 +34,7 @@ * of which the first 64 bytes are standardized as follows: */ #define PCI_STD_HEADER_SIZEOF 64 +#define PCI_STD_NUM_BARS 6 /* Number of standard BARs */ #define PCI_VENDOR_ID 0x00 /* 16 bits */ #define PCI_DEVICE_ID 0x02 /* 16 bits */ #define PCI_COMMAND 0x04 /* 16 bits */ |