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| author |   Linus Walleij <linus.walleij@linaro.org> | 2019-11-13 23:03:23 +0100 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2019-11-13 23:03:23 +0100 |
| commit | 1bcab70b782d6e2341ce47d6cca17c22a44ac6e4 (patch) | |
| tree | 14e95285d2053c8bc075a8c0da4492ea6e6e632c /include | |
| parent | Merge tag 'gpio-v5.5-updates-for-linus-part-2' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux into devel (diff) | |
| parent | gpio: merrifield: Pass irqchip when adding gpiochip (diff) | |
| download | wireguard-linux-1bcab70b782d6e2341ce47d6cca17c22a44ac6e4.tar.xz wireguard-linux-1bcab70b782d6e2341ce47d6cca17c22a44ac6e4.zip | |
Merge tag 'intel-gpio-v5.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-gpio-intel into devel
intel-gpio for v5.5-1
* Prerequisite patch against GPIO library to register pin ranges in time.
* Second attempt to fix Intel Merrifield GPIO driver to utilize irqchip.
The following is an automated git shortlog grouped by driver:
gpiolib:
- Introduce ->add_pin_ranges() callback
merrifield:
- Pass irqchip when adding gpiochip
- Add GPIO <-> pin mapping ranges via callback
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/gpio/driver.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h index cc9ade4552d9..e2480ef94c55 100644 --- a/include/linux/gpio/driver.h +++ b/include/linux/gpio/driver.h @@ -289,6 +289,9 @@ struct gpio_irq_chip { * state (such as pullup/pulldown configuration). * @init_valid_mask: optional routine to initialize @valid_mask, to be used if * not all GPIOs are valid. + * @add_pin_ranges: optional routine to initialize pin ranges, to be used when + * requires special mapping of the pins that provides GPIO functionality. + * It is called after adding GPIO chip and before adding IRQ chip. * @base: identifies the first GPIO number handled by this chip; * or, if negative during registration, requests dynamic ID allocation. * DEPRECATION: providing anything non-negative and nailing the base @@ -379,6 +382,8 @@ struct gpio_chip { unsigned long *valid_mask, unsigned int ngpios); + int (*add_pin_ranges)(struct gpio_chip *chip); + int base; u16 ngpio; const char *const *names; |