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| author |   Ben Skeggs <bskeggs@redhat.com> | 2011-04-28 02:34:21 +1000 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2011-05-16 10:50:59 +1000 |
| commit | 52eba8dd5e830a836425e92d002bc51e42d3280e (patch) | |
| tree | 88faa691a4828e7a3ca874e4d8d45a2a6feff23f /kernel/fork.c | |
| parent | drm/nouveau/pm: translate ramcfg strap through ram restrict table (diff) | |
| download | wireguard-linux-52eba8dd5e830a836425e92d002bc51e42d3280e.tar.xz wireguard-linux-52eba8dd5e830a836425e92d002bc51e42d3280e.zip | |
drm/nva3/clk: better pll calculation when no fractional fb div available
The core/mem/shader clocks don't support the fractional feedback divider,
causing our calculated clocks to be off by quite a lot in some cases. To
solve this we will switch to a search-based algorithm when fN is NULL.
For my NVA8 at PL3, this actually generates identical cooefficients to
the binary driver. Hopefully that's a good sign, and that does not
break VPLL calculation for someone..
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'kernel/fork.c')
0 files changed, 0 insertions, 0 deletions