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author | 2010-10-27 18:14:56 +0100 | |
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committer | 2010-10-28 13:54:41 +0100 | |
commit | 7dc50ec7283391dd7a29a80e2a0fb76731a6a7c7 (patch) | |
tree | cfce6e8adf5c4a50ed04f390a7acf8f4d7d8b5df /kernel/kmod.c | |
parent | ARM: 6466/1: implement flush_icache_all for the rest of the CPUs (diff) | |
download | wireguard-linux-7dc50ec7283391dd7a29a80e2a0fb76731a6a7c7.tar.xz wireguard-linux-7dc50ec7283391dd7a29a80e2a0fb76731a6a7c7.zip |
ARM: ensure membank array is always sorted
This was missing from the noMMU code, so there was the possibility
of things not working as expected if out of order memory information
was passed.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'kernel/kmod.c')
0 files changed, 0 insertions, 0 deletions