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| author |   cpw@sgi.com <cpw@sgi.com> | 2011-06-21 07:21:33 -0500 |
|---|---|---|
| committer |   Ingo Molnar <mingo@elte.hu> | 2011-06-21 14:50:34 +0200 |
| commit | ae90c232be376bd8a283f3b6fb37cb5bd2635d67 (patch) | |
| tree | 44257f318d85f6a2a4bba58261c5327bed2371cc /kernel | |
| parent | x86, UV: Correct failed topology memory leak (diff) | |
| download | wireguard-linux-ae90c232be376bd8a283f3b6fb37cb5bd2635d67.tar.xz wireguard-linux-ae90c232be376bd8a283f3b6fb37cb5bd2635d67.zip | |
x86, UV: Correct UV2 BAU destination timeout
Correct the UV2 broacast assist unit's destination timeout
period. And the activation status register in UV2 should be
tested for a destination timeout with a 4, not a 2. The values
for Active versus Timeout were reversed.
This patch is critical for TLB shootdown on an Altix UV2 system
(i.e. the follow-on to the current Altix UV).
Destination timeout period:
The period is set in 4 bits of memory-mapped register MISC_CONTROL.
The left bit toggles base period between 10us and 80us.
The other 3 bits are the multiplier.
Decimal 15, hex f, gives the maximum: 7 * 80us
Signed-off-by: Cliff Wickman <cpw@sgi.com>
Link: http://lkml.kernel.org/r/20110621122243.117324443@sgi.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'kernel')
0 files changed, 0 insertions, 0 deletions