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| author |   Miquel Raynal <miquel.raynal@bootlin.com> | 2019-04-08 09:41:44 +0200 |
|---|---|---|
| committer | Miquel Raynal <miquel.raynal@bootlin.com> | 2019-04-18 08:54:05 +0200 |
| commit | aee02f82e19a5df848861e0883a394a4996b5bd4 (patch) | |
| tree | a7d21e6769e043ae88f4f23770de138bb3b5f748 /lib/cpu_rmap.c | |
| parent | dt-bindings: mtd: sunxi-nand: Add YAML schemas (diff) | |
| download | wireguard-linux-aee02f82e19a5df848861e0883a394a4996b5bd4.tar.xz wireguard-linux-aee02f82e19a5df848861e0883a394a4996b5bd4.zip | |
dt-bindings: mtd: sunxi: Add new compatible
The A23/A33 NAND controller is slightly different than the A10+ ones,
eg. DMA handling is a bit different and a few register offsets
changed.
Introduce a new compatible to represent this version of the IP.
Also append '-controller' to the new compatible (which is required for
new compatibles) as this is describing a NAND controller and not a
NAND chip.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Diffstat (limited to 'lib/cpu_rmap.c')
0 files changed, 0 insertions, 0 deletions