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authorThomas Gleixner <tglx@linutronix.de>2020-12-15 10:48:07 +0100
committerThomas Gleixner <tglx@linutronix.de>2020-12-15 10:48:07 +0100
commit3c41e57a1e168d879e923c5583adeae47eec9f64 (patch)
treee6272012c4b766189be2821316a3d23d115f5195 /lib/crc32test.c
parentirq: Call tick_irq_enter() inside HARDIRQ_OFFSET (diff)
parentirqchip/qcom-pdc: Fix phantom irq when changing between rising/falling (diff)
downloadwireguard-linux-3c41e57a1e168d879e923c5583adeae47eec9f64.tar.xz
wireguard-linux-3c41e57a1e168d879e923c5583adeae47eec9f64.zip
Merge tag 'irqchip-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core
Pull irqchip updates for 5.11 from Marc Zyngier: - Preliminary support for managed interrupts on platform devices - Correctly identify allocation of MSIs proxyied by another device - Remove the fasteoi IPI flow which has been proved useless - Generalise the Ocelot support to new SoCs - Improve GICv4.1 vcpu entry, matching the corresponding KVM optimisation - Work around spurious interrupts on Qualcomm PDC - Random fixes and cleanups Link: https://lore.kernel.org/r/20201212135626.1479884-1-maz@kernel.org
Diffstat (limited to 'lib/crc32test.c')
-rw-r--r--lib/crc32test.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/lib/crc32test.c b/lib/crc32test.c
index 97d6a57cefcc..61ddce2cff77 100644
--- a/lib/crc32test.c
+++ b/lib/crc32test.c
@@ -683,7 +683,6 @@ static int __init crc32c_test(void)
/* reduce OS noise */
local_irq_save(flags);
- local_irq_disable();
nsec = ktime_get_ns();
for (i = 0; i < 100; i++) {
@@ -694,7 +693,6 @@ static int __init crc32c_test(void)
nsec = ktime_get_ns() - nsec;
local_irq_restore(flags);
- local_irq_enable();
pr_info("crc32c: CRC_LE_BITS = %d\n", CRC_LE_BITS);
@@ -768,7 +766,6 @@ static int __init crc32_test(void)
/* reduce OS noise */
local_irq_save(flags);
- local_irq_disable();
nsec = ktime_get_ns();
for (i = 0; i < 100; i++) {
@@ -783,7 +780,6 @@ static int __init crc32_test(void)
nsec = ktime_get_ns() - nsec;
local_irq_restore(flags);
- local_irq_enable();
pr_info("crc32: CRC_LE_BITS = %d, CRC_BE BITS = %d\n",
CRC_LE_BITS, CRC_BE_BITS);