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author | 2007-12-24 19:51:31 +0800 | |
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committer | 2007-12-24 19:51:31 +0800 | |
commit | 76a7f4049277691b9b800a23dc09009374cdaa21 (patch) | |
tree | 1cd3070c59cf43ffbaff2d324d204a3085428e3f /net/ipv4/raw.c | |
parent | [Blackfin] arch: Restore default DMA priority over core on bf54x. (diff) | |
download | wireguard-linux-76a7f4049277691b9b800a23dc09009374cdaa21.tar.xz wireguard-linux-76a7f4049277691b9b800a23dc09009374cdaa21.zip |
[Blackfin] arch: fix bug when DMA operation related core B of BF561
- Before DMA'ing data to core B L1 memory, caches have to be flushed.
- Before DMA'ing data from core B L1 memory, caches have to be invalidated.
- Fix lock/unlock.
Signed-off-by: Enrik Berkhan <Enrik.Berkhan@ge.com>
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'net/ipv4/raw.c')
0 files changed, 0 insertions, 0 deletions