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| author |   Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com> | 2025-01-13 14:07:03 +0200 |
|---|---|---|
| committer |   Marc Kleine-Budde <mkl@pengutronix.de> | 2025-02-19 11:06:15 +0100 |
| commit | 8c652cf030a769fbfc73cfc280ed3f1656343c35 (patch) | |
| tree | 90bbb5d48451dc1ad3d8649912535f97dbd24912 /net/lapb/lapb_timer.c | |
| parent | dt-bindings: can: fsl,flexcan: add S32G2/S32G3 SoC support (diff) | |
| download | wireguard-linux-8c652cf030a769fbfc73cfc280ed3f1656343c35.tar.xz wireguard-linux-8c652cf030a769fbfc73cfc280ed3f1656343c35.zip | |
can: flexcan: Add quirk to handle separate interrupt lines for mailboxes
Introduce 'FLEXCAN_QUIRK_SECONDARY_MB_IRQ' quirk to handle a FlexCAN
hardware module integration particularity where two ranges of mailboxes
are controlled by separate hardware interrupt lines.
The same 'flexcan_irq' handler is used for both separate mailbox interrupt
lines, with no other changes.
Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
Reviewed-by: Vincent Mailhol <mailhol.vincent@wanadoo.fr>
Link: https://patch.msgid.link/20250113120704.522307-3-ciprianmarian.costea@oss.nxp.com
[mkl: flexcan_open(): change order and free irq_secondary_mb first]
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Diffstat (limited to 'net/lapb/lapb_timer.c')
0 files changed, 0 insertions, 0 deletions