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| author |   Geert Uytterhoeven <geert+renesas@glider.be> | 2025-02-05 14:24:15 +0100 |
|---|---|---|
| committer |   Russell King (Oracle) <rmk+kernel@armlinux.org.uk> | 2025-03-26 13:31:18 +0000 |
| commit | 9cac324d6f4900f92d41db5fd6b73b6feb0bfb68 (patch) | |
| tree | 72826e144494f294552a7152593c03a1921c0728 /net/lapb/lapb_timer.c | |
| parent | ARM: 9441/1: rust: Enable Rust support for ARMv7 (diff) | |
| download | wireguard-linux-9cac324d6f4900f92d41db5fd6b73b6feb0bfb68.tar.xz wireguard-linux-9cac324d6f4900f92d41db5fd6b73b6feb0bfb68.zip | |
ARM: 9442/1: smp: Fix IPI alignment in /proc/interrupts
On a system with less than 1000 interrupts, prec = 3, causing a
misalignment for the IPI interrupts. E.g. on Koelsch (R-Car M2-W):
200: 0 0 gpio-rcar 6 Edge SW36
IPI0: 0 0 CPU wakeup interrupts
IPI1: 0 0 Timer broadcast interrupts
IPI2: 1701 2844 Rescheduling interrupts
IPI3: 10338 21181 Function call interrupts
IPI4: 0 0 CPU stop interrupts
IPI5: 651 825 IRQ work interrupts
IPI6: 0 0 completion interrupts
Err: 0
Fix this by adopting the same solution as used on arm64.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Diffstat (limited to 'net/lapb/lapb_timer.c')
0 files changed, 0 insertions, 0 deletions