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| author |   Douglas Anderson <dianders@chromium.org> | 2025-01-07 12:06:01 -0800 |
|---|---|---|
| committer |   Catalin Marinas <catalin.marinas@arm.com> | 2025-03-14 17:58:25 +0000 |
| commit | a9b5bd81b294d30a747edd125e9f6aef2def7c79 (patch) | |
| tree | 3daa8ac3fa6d87254bd2cf8ebfacf3594f49c9e6 /net/lapb/lapb_timer.c | |
| parent | arm64: errata: Add KRYO 2XX/3XX/4XX silver cores to Spectre BHB safe list (diff) | |
| download | wireguard-linux-a9b5bd81b294d30a747edd125e9f6aef2def7c79.tar.xz wireguard-linux-a9b5bd81b294d30a747edd125e9f6aef2def7c79.zip | |
arm64: cputype: Add MIDR_CORTEX_A76AE
>From the TRM, MIDR_CORTEX_A76AE has a partnum of 0xDOE and an
implementor of 0x41 (ARM). Add the values.
Cc: stable@vger.kernel.org # dependency of the next fix in the series
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20250107120555.v4.4.I151f3b7ee323bcc3082179b8c60c3cd03308aa94@changeid
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'net/lapb/lapb_timer.c')
0 files changed, 0 insertions, 0 deletions