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| author |   Kumar Sanghvi <kumaras@chelsio.com> | 2014-02-18 17:56:14 +0530 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2014-02-18 16:23:01 -0500 |
| commit | 0034b2986ae44c72f8b784cf419e67f48e5304de (patch) | |
| tree | 632865a2df3be013709ba9474c27fc47e7083740 /net/tipc | |
| parent | cxgb4: Remove unused registers and add missing ones (diff) | |
| download | wireguard-linux-0034b2986ae44c72f8b784cf419e67f48e5304de.tar.xz wireguard-linux-0034b2986ae44c72f8b784cf419e67f48e5304de.zip | |
cxgb4: Don't assume LSO only uses SGL path in t4_eth_xmit()
Also, modify is_eth_imm() to return header length so it doesn't
have to be recomputed in calc_tx_flits().
Based on original work by Mike Werner <werner@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'net/tipc')
0 files changed, 0 insertions, 0 deletions