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| author |   hayeswang <hayeswang@realtek.com> | 2014-02-18 21:49:04 +0800 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2014-02-18 16:40:01 -0500 |
| commit | aa66a5f1af163b6c90fca5a06c7fdab121b70cd2 (patch) | |
| tree | b4f4481d7b3c1120d0ee3c69b2aad2aa4801853c /net/tipc | |
| parent | r8152: clear BMCR_PDOWN (diff) | |
| download | wireguard-linux-aa66a5f1af163b6c90fca5a06c7fdab121b70cd2.tar.xz wireguard-linux-aa66a5f1af163b6c90fca5a06c7fdab121b70cd2.zip | |
r8152: combine PHY reset with set_speed
PHY reset is necessary after some hw settings. However, it would
cause the linking down, and so does the set_speed function. Combine
the PHY reset with set_speed function. That could reduce the frequency
of linking down and accessing the PHY register.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'net/tipc')
0 files changed, 0 insertions, 0 deletions