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author | 2020-02-26 16:27:08 +0100 | |
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committer | 2020-03-20 18:40:44 +0100 | |
commit | f232d9ec029ce3e2543b05213e2979e01e503408 (patch) | |
tree | 3a73919e1e4e8f6cf038f59a0bf4971614127410 /net/unix/af_unix.c | |
parent | drm/etnaviv: request pages from DMA32 zone when needed (diff) | |
download | wireguard-linux-f232d9ec029ce3e2543b05213e2979e01e503408.tar.xz wireguard-linux-f232d9ec029ce3e2543b05213e2979e01e503408.zip |
drm/etnaviv: fix TS cache flushing on GPUs with BLT engine
As seen in the Vivante kernel driver, most GPUs with the BLT engine have
a broken TS cache flush. The workaround is to temporarily set the BLT
command to CLEAR_IMAGE, without actually executing the clear. Apparently
this state change is enough to trigger the required TS cache flush. As
the BLT engine is completely asychronous, we also need a few more stall
states to synchronize the flush with the frontend.
Root-caused-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Diffstat (limited to 'net/unix/af_unix.c')
0 files changed, 0 insertions, 0 deletions