diff options
| author |   Stephen Boyd <sboyd@kernel.org> | 2024-09-21 14:10:53 -0700 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2024-09-21 14:10:53 -0700 |
| commit | c7183ff52f253f146084be1bfb4b80de7ffbd346 (patch) | |
| tree | 41e5de94723154d3bccb9b10f9e11799b266c32d /rust/helpers/workqueue.c | |
| parent | Merge branches 'clk-kunit', 'clk-mediatek', 'clk-cleanup' and 'clk-bindings' into clk-next (diff) | |
| parent | clk: clk-conf: support assigned-clock-rates-u64 (diff) | |
| parent | Merge tag 'renesas-clk-for-v6.12-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas (diff) | |
| parent | clk: scmi: add is_prepared hook (diff) | |
| download | wireguard-linux-c7183ff52f253f146084be1bfb4b80de7ffbd346.tar.xz wireguard-linux-c7183ff52f253f146084be1bfb4b80de7ffbd346.zip | |
Merge branches 'clk-assigned-rates', 'clk-renesas' and 'clk-scmi' into clk-next
* clk-assigned-rates:
clk: clk-conf: support assigned-clock-rates-u64
* clk-renesas: (34 commits)
clk: renesas: r9a09g057: Add clock and reset entries for GTM/RIIC/SDHI/WDT
clk: renesas: rzv2h: Add support for dynamic switching divider clocks
clk: renesas: r9a08g045: Add clocks, resets and power domains for USB
dt-bindings: clock: renesas,cpg-clocks: Add top-level constraints
clk: renesas: r8a779h0: Add CANFD clock
clk: renesas: Add RZ/V2H(P) CPG driver
clk: renesas: Add family-specific clock driver for RZ/V2H(P)
dt-bindings: clock: renesas: Document RZ/V2H(P) SoC CPG
clk: renesas: r8a779h0: Add PWM clock
dt-bindings: clock: renesas,cpg-mssr: Document RZ/G2M v3.0 (r8a774a3) clock
clk: renesas: rcar-gen4: Remove unused default PLL2/3/4/6 configs
clk: renesas: rcar-gen4: Remove unused fixed PLL clock types
clk: renesas: rcar-gen4: Remove unused variable PLL2 clock type
clk: renesas: r8a779h0: Model PLL1/2/3/4/6 as fractional PLLs
clk: renesas: r8a779g0: Model PLL1/3/4/6 as fractional PLLs
clk: renesas: r8a779f0: Model PLL1/2/3/6 as fractional PLLs
clk: renesas: r8a779a0: Use defines for PLL control registers
clk: renesas: rcar-gen4: Add support for fractional 9.24 PLLs
clk: renesas: rcar-gen4: Add support for fixed variable PLLs
clk: renesas: rcar-gen4: Add support for variable fractional PLLs
...
* clk-scmi:
clk: scmi: add is_prepared hook