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| author |   Lijo Lazar <lijo.lazar@amd.com> | 2026-04-27 17:17:41 +0530 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2026-04-28 15:46:30 -0400 |
| commit | d6b99885b122528651d554a7bd907211a81579c2 (patch) | |
| tree | 56b11e756ffa02272b7042f345b7da58bc5a7c34 /rust/kernel/num/ssh:/git@git.zx2c4.com | |
| parent | drm/amd/display: Update MCIF_ADDR macro to address IGT DWB regression (diff) | |
drm/amd/pm: Update emit clock logic
If only one level is enabled in clock table, there is no need to
follow the fine grained clock logic which expects a minimum of
two levels (min/max).
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 7f19097af1496dd908a044ca95862f32d05f02df)
Diffstat (limited to 'rust/kernel/num/ssh:/git@git.zx2c4.com')
0 files changed, 0 insertions, 0 deletions