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authorSiddharth Vadapalli <s-vadapalli@ti.com>2023-03-15 11:53:04 +0530
committerNishanth Menon <nm@ti.com>2023-03-20 12:46:23 -0500
commita2ff7f1108f6eeaa73a60378ed891b634a3bba61 (patch)
tree9e9bda821f037687079fdb472ebfdb7c7bd63de2 /rust/kernel/ssh:/git@git.zx2c4.com/git:
parentarm64: dts: ti: k3-j784s4-evm: Enable MCU CPSW2G (diff)
arm64: dts: ti: k3-j721e: Add CPSW9G nodes
TI's J721E SoC has a 9 port Ethernet Switch instance with 8 external ports and 1 host port, referred to as CPSW9G. Add device-tree nodes for CPSW9G and disable it by default. Device-tree overlays will be used to enable it. Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Reviewed-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20230315062307.1612220-2-s-vadapalli@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
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