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| author |   Daniel Henrique Barboza <dbarboza@ventanamicro.com> | 2023-12-05 14:45:09 -0300 |
|---|---|---|
| committer |   Anup Patel <anup@brainfault.org> | 2023-12-29 12:31:56 +0530 |
| commit | 3975525e554559117bbf569239c8b41f2c2fa5cf (patch) | |
| tree | c802021065f741fbdbb8e219efea6b3e098befa9 /rust/kernel/ssh:/git@git.zx2c4.com | |
| parent | RISC-V: KVM: add 'vlenb' Vector CSR (diff) | |
RISC-V: KVM: add vector registers and CSRs in KVM_GET_REG_LIST
Add all vector registers and CSRs (vstart, vl, vtype, vcsr, vlenb) in
get-reg-list.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Anup Patel <anup@brainfault.org>
Diffstat (limited to 'rust/kernel/ssh:/git@git.zx2c4.com')
0 files changed, 0 insertions, 0 deletions