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| author | 2024-07-01 10:53:41 +0200 | |
|---|---|---|
| committer | 2024-07-03 09:13:38 +0100 | |
| commit | 8d7330b3a9c6db53d4462820df566c0b1e77d831 (patch) | |
| tree | 6a61c295f0f31f0bc129208a774b3116eddb7aab /rust/kernel/ssh:/git@git.zx2c4.com | |
| parent | Merge branch 'device-memory-tcp' (diff) | |
net: dsa: microchip: lan9371/2: add 100BaseTX PHY support
On the LAN9371 and LAN9372, the 4th internal PHY is a 100BaseTX PHY
instead of a 100BaseT1 PHY. The 100BaseTX PHYs have a different base
register offset.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Acked-by: Arun Ramadoss <arun.ramadoss@microchip.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'rust/kernel/ssh:/git@git.zx2c4.com')
0 files changed, 0 insertions, 0 deletions
