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| author |   Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2023-09-24 20:31:02 +0200 |
|---|---|---|
| committer |   Bjorn Andersson <andersson@kernel.org> | 2023-12-02 16:48:46 -0800 |
| commit | f64f653df2ef713359178c731bc8f89ff54014b1 (patch) | |
| tree | 23a562bbccaf1cc95ed2043bfc6e5d82916063fa /rust/kernel/ssh:/git@git.zx2c4.com | |
| parent | ARM: dts: qcom: sdx65: correct PCIe EP phy-names (diff) | |
ARM: dts: qcom: sdx65: add missing GCC clocks
The SDX65 GCC clock controller expects two required clocks:
pcie_pipe_clk and usb3_phy_wrapper_gcc_usb30_pipe_clk. The first one is
provided by existing phy node, but second is not yet implemented.
qcom-sdx65-mtp.dtb: clock-controller@100000: clocks: [[11, 0], [11, 1], [12]] is too short
qcom-sdx65-mtp.dtb: clock-controller@100000: clock-names: ['bi_tcxo', 'bi_tcxo_ao', 'sleep_clk'] is too short
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230924183103.49487-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'rust/kernel/ssh:/git@git.zx2c4.com')
0 files changed, 0 insertions, 0 deletions