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| author |   Fugang Duan <fugang.duan@cixtech.com> | 2025-07-21 22:44:54 +0800 |
|---|---|---|
| committer |   Arnd Bergmann <arnd@arndb.de> | 2025-07-21 17:14:55 +0200 |
| commit | aa4bc2850e671cc71081f637dd6db1faca8adac7 (patch) | |
| tree | 5ef03a6bf519c255b64c511659705f58873776ad /rust/pin-init/internal/src | |
| parent | dt-bindings: arm: add CIX P1 (SKY1) SoC (diff) | |
| download | wireguard-linux-aa4bc2850e671cc71081f637dd6db1faca8adac7.tar.xz wireguard-linux-aa4bc2850e671cc71081f637dd6db1faca8adac7.zip | |
arm64: Kconfig: add ARCH_CIX for cix silicons
Add ARCH_CIX for CIX SoC series support.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Fugang Duan <fugang.duan@cixtech.com>
Signed-off-by: Peter Chen <peter.chen@cixtech.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'rust/pin-init/internal/src')
0 files changed, 0 insertions, 0 deletions