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| author |   Jacky Chou <jacky_chou@aspeedtech.com> | 2025-07-15 11:43:17 +0800 |
|---|---|---|
| committer |   Linus Walleij <linus.walleij@linaro.org> | 2025-07-23 13:22:41 +0200 |
| commit | b1d4c90bffdeda6c0a304249358608e4ddb80377 (patch) | |
| tree | 9f2f563eb6c053466064bd8cbc3db1f4c14c3f45 /rust/pin-init/internal/src | |
| parent | pinctrl: ingenic: use pinmux_generic_add_pinfunction() (diff) | |
| download | wireguard-linux-b1d4c90bffdeda6c0a304249358608e4ddb80377.tar.xz wireguard-linux-b1d4c90bffdeda6c0a304249358608e4ddb80377.zip | |
pinctrl: aspeed-g6: Add PCIe RC PERST pin group
The PCIe RC PERST uses SSPRST# as PERST# and enable this pin
to output.
Signed-off-by: Jacky Chou <jacky_chou@aspeedtech.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/20250715034320.2553837-8-jacky_chou@aspeedtech.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'rust/pin-init/internal/src')
0 files changed, 0 insertions, 0 deletions