diff options
| author |   Gustavo Sousa <gustavo.sousa@intel.com> | 2026-05-14 18:44:46 -0300 |
|---|---|---|
| committer |   Rodrigo Vivi <rodrigo.vivi@intel.com> | 2026-05-18 09:22:47 -0400 |
| commit | 6df5678b6a94ac80e31e847074c4b30c21025b1f (patch) | |
| tree | ce651868406fc1cbc5e35a1a8f58046de8cde0c8 /samples/kobject/ssh:/git@git.zx2c4.com/git: | |
| parent | drm/xe: Define and use MCR version of COMMON_SLICE_CHICKEN1 (diff) | |
drm/xe: Define and use MCR version of COMMON_SLICE_CHICKEN4
The register COMMON_SLICE_CHICKEN4 is a MCR register on both Xe2 and
Xe3. Let's make sure to define a MCR version of it and use it for the
relevant IP versions.
Use XEHP_ as prefix for the register name, since it is MCR as of Xe_HP.
v2:
- Also change for one entry in lrc_tunnings, which was caught by
manual testing and add corresponging Fixes tag in commit message.
(Gustavo)
Fixes: 8d6f16f1f082 ("drm/xe: Extend Wa_22021007897 to Xe3 platforms")
Fixes: e5c13e2c505b ("drm/xe/xe2hpg: Add Wa_22021007897")
Fixes: 8ccf5f6b2295 ("drm/xe/tuning: Apply windower hardware filtering setting on Xe3 and Xe3p")
Bspec: 66534, 71185, 74417
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patch.msgid.link/20260514-rtp-mcr-check-v3-3-30dd47855fee@intel.com
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
(cherry picked from commit 75f65f1a4c06da1d87f28570a9d4cdad28f13360)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'samples/kobject/ssh:/git@git.zx2c4.com/git:')
0 files changed, 0 insertions, 0 deletions