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authorSrinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>2026-03-11 12:42:28 +0000
committerLinus Walleij <linusw@kernel.org>2026-03-16 10:11:09 +0100
commitfc334ad4a1d110754b3ec3abd0805d1ae1cfcc4b (patch)
treef8ae99c7122e4cd9fa3b69a92ff58f4bc5ec6b6d /samples/kobject/ssh:/git@git.zx2c4.com/git:
parentdt-bindings: pinctrl: pincfg-node: permit bias-high-impedance with other bias properties (diff)
dt-bindings: pinctrl: qcom,sm8650-lpass-lpi-pinctrl: Add Glymur pinctrl
Document compatible for Qualcomm Glymur SoC LPASS TLMM pin controller, fully compatible with previous SM8650 generation (same amount of pins and functions). Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
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