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| author |   Huacai Chen <chenhuacai@loongson.cn> | 2025-08-20 22:23:44 +0800 |
|---|---|---|
| committer | Huacai Chen <chenhuacai@loongson.cn> | 2025-08-20 22:23:44 +0800 |
| commit | 112ca94f6c3b3e0b2002a240de43c487a33e0234 (patch) | |
| tree | 063ad22e3271ad5532a756107d016e949209b870 /scripts/basic/git:/ssh:/git@git.zx2c4.com | |
| parent | LoongArch: Optimize module load time by optimizing PLT/GOT counting (diff) | |
| download | wireguard-linux-112ca94f6c3b3e0b2002a240de43c487a33e0234.tar.xz wireguard-linux-112ca94f6c3b3e0b2002a240de43c487a33e0234.zip | |
LoongArch: Save LBT before FPU in setup_sigcontext()
Now if preemption happens between protected_save_fpu_context() and
protected_save_lbt_context(), FTOP context is lost. Because FTOP is
saved by protected_save_lbt_context() but protected_save_fpu_context()
disables TM before that. So save LBT before FPU in setup_sigcontext()
to avoid this potential risk.
Signed-off-by: Hanlu Li <lihanlu@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Diffstat (limited to 'scripts/basic/git:/ssh:/git@git.zx2c4.com')
0 files changed, 0 insertions, 0 deletions