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| author |   Swapnil Jakhade <sjakhade@cadence.com> | 2025-06-16 12:17:05 +0530 |
|---|---|---|
| committer |   Vinod Koul <vkoul@kernel.org> | 2025-06-16 22:37:19 +0530 |
| commit | 351e07e6b2ecc16ef8669713b14b6f67518c945d (patch) | |
| tree | 4df1631d114ff3fb69478bc174e6c44762e65902 /scripts/basic/git:/ssh:/git@git.zx2c4.com | |
| parent | phy: cadence-torrent: Add PCIe multilink configuration for 100 MHz refclk (diff) | |
| download | wireguard-linux-351e07e6b2ecc16ef8669713b14b6f67518c945d.tar.xz wireguard-linux-351e07e6b2ecc16ef8669713b14b6f67518c945d.zip | |
phy: cadence-torrent: Add PCIe multilink + USB with same SSC register config for 100 MHz refclk
Add register sequences and support for PCIe multilink + USB configuration
for 100MHz reference clock. The same SSC is used for both PCIe and USB.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Co-developed-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20250616064705.3225758-3-s-vadapalli@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'scripts/basic/git:/ssh:/git@git.zx2c4.com')
0 files changed, 0 insertions, 0 deletions