diff options
| author | 2025-02-24 12:18:30 +0000 | |
|---|---|---|
| committer | 2025-03-20 08:07:42 -0700 | |
| commit | a26503092c75abba70a0be2aa01145ecf90c2a22 (patch) | |
| tree | ebe7c76fb9bf440fd50b0a1b7a504cbe73dfa615 /scripts/basic/git:/ssh:/git@git.zx2c4.com | |
| parent | tty: serial: fsl_lpuart: rename register variables more specifically (diff) | |
| download | wireguard-linux-a26503092c75abba70a0be2aa01145ecf90c2a22.tar.xz wireguard-linux-a26503092c75abba70a0be2aa01145ecf90c2a22.zip | |
serial: 8250_dma: terminate correct DMA in tx_dma_flush()
When flushing transmit side DMA, it is the transmit channel that should
be terminated, not the receive channel.
Fixes: 9e512eaaf8f40 ("serial: 8250: Fix fifo underflow on flush")
Cc: stable <stable@kernel.org>
Reported-by: Wentao Guan <guanwentao@uniontech.com>
Signed-off-by: John Keeping <jkeeping@inmusicbrands.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Link: https://lore.kernel.org/r/20250224121831.1429323-1-jkeeping@inmusicbrands.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'scripts/basic/git:/ssh:/git@git.zx2c4.com')
0 files changed, 0 insertions, 0 deletions
